The present invention relates to a semiconductor memory device, and more particularly to an on-die termination (ODT) control.
A swing width of signals that interfaces between semiconductor memory devices is reduced as the semiconductor memory devices operate in higher speeds to minimize the delay time associated with transferring the signals. However, as the swing width of the signals is reduced, the influence of external noise is increased, and the signal reflection due to impedance mismatching at an interface becomes a critical problem.
Such impedance mismatching occurs due to external noise, fluctuations in the power supply voltage, changes in the operational temperature, changes in the manufacturing process, etc. When the impedance mismatching occurs, it is difficult to transmit data at high speeds, causing problems of distorted output data.
When the distorted output signal is transmitted, problems such as a setup/hold fail or misjudgment of an input level or the like can frequently occur at a receiving side.
In particular, in the electronic products utilizing dynamic random access memories (DRAM), the frequency of a signal bus is dramatically increased in order to realize high-speed operation. Therefore, efforts were made in the bus termination technology in the past to find ways to minimize the signal integrity distortions by solving the impedance mismatching problems. In an electronic system having a stub bus structure, using the on-die termination (ODT) was considered to be more advantageous for improving the signal integrity than using a motherboard termination (MBT).
On-die termination (ODT) means that the termination structure is implemented at an input/output port (“I/O port”) of a memory mounted on a memory module. Consequently, the on-die termination (ODT) is an impedance matching circuit called the on-chip termination and is formed near a pad in a chip of an integrated circuit.
In a synchronous dynamic random access memory (SDRAM) having a double data rate type and other similar devices, the typical on-die termination (ODT) for impedance matching is achieved by connecting a resistor element having a fixed resistance value to the pad.
An on-die termination device as described above is configured as a pull-up resistor and a pull-down resistor. However, in the conventional on-die termination device, the on-die termination resistance values are unavoidably changed due to the changes in the external environment, and in order to compensate for the changed resistance values, the physical changes such as a changed option layer are required. These required physical changes are very inefficient as they relate to correction works on a processor.
There is also a problem in that the on-die termination resistance value become inadequate when there are changes in the external voltage, since the corrective work to change the external voltage is not performed. These problems degrade the characteristics of the input buffer, thereby degrading the overall efficiency of the device.